Custom Ku-Band ASICs for Phased Array Satellite Comms

Delivering high-speed internet to a moving plane, ship, or bus means replacing the traditional dish with a low-profile, electronically steered phased array antenna. The RF engineering required to make this work is exceptionally difficult.

Our team designed, built, and demonstrated the custom ASICs and complex PCB for a phased array system capable of receiving the entire 2GHz-wide Ku-band (10.7 - 12.75 GHz) at once.

The Challenge: Solving "Impossible" RF Problems

This system required solving several complex, inter-related challenges at the silicon level.

• 2GHz Instantaneous Bandwidth: The system had to process the entire Ku-band simultaneously. This meant all components had to be extremely broadband.
• True-Time Delay (TTD): Standard phase shifters are not frequency-independent. Using them would create signal distortion (inconsistent group delay) across the 2GHz band. A programmable true-time delay was the only solution.
• Real-Time Polarization Processing: The satellite transmits V/H polarized signals, but the antenna is on a moving vehicle, so its X/Y orientation is arbitrary. The ASICs had to calculate and correct this polarization shift in real-time.
• Extreme Low Noise: The total system noise figure (NF) target was 0.7dB, which required the ASICs themselves to achieve an NF of ~2dB.
• High-Density Integration: A full subsystem for 64 antenna elements had to be integrated on the back of a 10x10cm antenna tile.

Our Solution: A Modular, SiGe BiCMOS ASIC System

We designed the solution in a 180GHz fT SiGe BiCMOS process, which provided the high-frequency RF performance needed. Instead of one massive chip, we created a modular, hierarchical system.

1. ASIC 1 (The "Workhorse"): This chip processes signals from four antenna elements. Its signal path includes an LNA, an I/Q mixer to downconvert to a 2 GHz IF, a dedicated programmable TTD circuit for each channel, and the logic for the V/H polarization calculation.
2. ASIC 2 (The "Combiner"): This chip combines the outputs of four "ASIC 1" chips, adding another layer of dedicated true-time delay for its 16-element block.
3. ASIC 3 (The "Final Stage"): This chip combines the outputs of four "ASIC 2" chips, providing the largest system delay for the full 64-element tile.
4. 15-Layer RF-PCB: We designed a dedicated, complex 15-layer RF board that integrated the patch antenna array on the front and all the RF routing and ASIC components on the back.

The Result: A Proven, Published Design

The complete demonstrator, built on a Dutch government-subsidized program (Satrax) with partners like NLR, University of Twente, and Astron, was successful. The ASICs and PCB performed as designed, and the results were published and presented at the European Microwave Week (EuMW) 2014.

Key Specifications & Technology

• Process: NXP QUBiC4Xi / 0.25 µm SiGe BiCMOS (fT ~ 180 GHz)
• Frequency: 11 – 13 GHz Ku-Band (2 GHz instantaneous bandwidth)
• System NF: ~ 2 dB (ASIC-level)
• LO Input: 10 GHz
• Key IP: Programmable True-Time Delay (TTD) cells, polarization correctors
• Build: Full-custom ASIC & 15-layer RF-PCB design

Have a Complex RF System Challenge?

From Ku-band phased arrays to complex mmWave transceivers, our team has the proven, hands-on experience to design the custom ASICs for your most demanding RF challenges.

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