Latenium™ X-Ray Detector Readout: FPGA-Based Evaluation System

The Engineering Challenge: Dual-Purpose Integration

The primary design constraint was integrating comprehensive control capabilities into a compact footprint that could serve both the lab and the field. G-ray required a system that allowed deep access to sensor timing parameters for internal characterization, yet remained stable and user-friendly for external technology demonstrations.

Support for G-ray's "Digital Direct Conversion" mode was critical. This detection method requires high-speed readout logic to handle energy discrimination data without introducing latency, demanding a robust digital architecture capable of precise synchronization with the CMOS sensor.

System Architecture and Control

To meet the bandwidth and timing requirements, we designed a stand-alone evaluation unit centered around a hybrid processing architecture:

• Integrated FPGA Control: An onboard FPGA handles the critical real-time tasks, including the generation of precise timing parameters for the sensor and high-speed data acquisition. This allows for full manipulation of the sensor’s integration times and readout modes.
• Embedded CPU: An integrated CPU manages the application layer, system status monitoring, and communication protocols, ensuring the FPGA is free to focus on deterministic tasks.
• Connectivity & Debugging: Data transfer is handled via a standard Ethernet interface to a host workstation. We implemented specific debugging modes to analyze system behavior at the signal level, alongside physical status LEDs for immediate hardware state indication.

Results and Turnkey Delivery

Bruco IC managed the complete realization of the Latenium™ evaluation system, from the initial PCB layout and schematic capture to VHDL code development and final system verification.

The resulting platform enables G-ray to demonstrate their core value propositions—high-speed readout, minimized blurring, and low-dose procedures—on a single, portable device. The system is currently used for both the electrical characterization of new silicon and as a demonstration unit for G-ray’s commercial partners.

Key Features

• Core Function: Stand-alone evaluation and characterization
• Control Logic: Integrated FPGA for sensor timing and settings
• Processing: Onboard CPU for application support
• Interface: Standard Ethernet for workstation data transfer
• Form Factor: Compact design for portability and integration
• Capabilities: Full support for Digital Direct Conversion and Energy Discrimination modes

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